VHDL design main page

 VHDL design main page

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# Step by step installation and path setting of GHDL and GTKWave. open VHDL simulator on windows platform.

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# Design and implement all basic gates in VHDL on simuator GHDL and GTKWave.

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# Test VHDL code of half adder code on GHDL and GTKWave open simulator.

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#Design and implement the full adder circuit by taking instance of the half adder circuit in structural style modeling in VHDL on GHDL and GTKWave simulator.

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# Design 3X8 decoder using behavioral style modelling in VHDL and simulate using GHDL and GTKWave open simulator. 

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# Design 8X3 encoder using structural style modeling in VHDL and simulate on GHDL and GTKWave open simulator.

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# Design 1X8 demux using behavioural style modelling in VHDL and simulate on GHDL and GTKWave open simulator.

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# Design 8X1 mux using structural style modelling in VHDL by taking the instance of mux 4X1 designed with the dataflow modeling. Simulate the design on GHDL and GTKWave open simulator.

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